OpenAI Unveils Jalapeño — Its First Custom AI Chip

OpenAI and Broadcom reveal Jalapeño, a custom inference chip that cuts AI serving costs by 50%. Deploying by end of 2026.

AI Tutorials · · 2 min read

Quick answer

OpenAI and Broadcom unveiled Jalapeño on June 24, 2026 — OpenAI's first custom-designed AI chip. Built specifically for inference (running models like ChatGPT), it cuts serving costs by roughly 50% compared to standard Nvidia GPUs and was developed in a record nine months.

OpenAI has entered the chip business. On June 24, the company unveiled Jalapeño, its first custom AI processor, built in partnership with semiconductor giant Broadcom. The chip is designed for one job: running large language models faster and cheaper than existing hardware.

Why OpenAI Is Building Its Own Chips

Running ChatGPT for hundreds of millions of users is extraordinarily expensive. Every conversation requires inference — the process of feeding your prompt through billions of model parameters to generate a response. Today, that work runs almost entirely on Nvidia GPUs, which are powerful but general-purpose and costly.

Jalapeño takes a different approach. Instead of using a chip designed to do everything, OpenAI and Broadcom built one that does only inference, and does it exceptionally well. Early testing shows roughly 50% cost savings compared to standard AI GPUs on measures like cost per token.

Built in Record Time

The chip went from initial design to manufacturing tape-out in just nine months — what Broadcom says is the fastest development cycle ever for a high-performance AI chip. OpenAI used its own models to speed up parts of the design and optimisation process, making Jalapeño one of the first chips partially designed by AI.

The processor is a large reticle-sized ASIC with six high-bandwidth memory modules, purpose-built for the kind of workloads ChatGPT and GPT-5.5 generate at scale.

What This Means for You

If you use ChatGPT, this matters even though you will never see the chip itself. Lower inference costs mean OpenAI has room to reduce prices, improve response speeds, or offer more capable models without raising subscription fees. With GPT-5.6 expected soon, having cheaper hardware to run it on could shape what features make it into the final release.

The move also signals a broader industry shift. Google already designs its own TPU chips, and Amazon has its Trainium processors. OpenAI joining the custom silicon race means the three largest AI providers are all building hardware tailored to their specific models — a trend that should drive down costs across the industry.

Initial deployment is planned for the end of 2026, with expansion into gigawatt-scale data centres in the years ahead.

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Frequently asked questions

What is OpenAI's Jalapeño chip?
Jalapeño is OpenAI's first custom AI inference processor, co-developed with Broadcom. It is purpose-built for running large language models like GPT-5.5 and ChatGPT, delivering roughly 50% lower cost per token compared to standard Nvidia GPUs.
When will the Jalapeño chip be available?
OpenAI and Broadcom are targeting initial deployment by the end of 2026, with plans to expand in the years ahead as part of gigawatt-scale data centres with Microsoft and other partners.
Does this mean OpenAI is replacing Nvidia?
Not immediately. Jalapeño is designed for inference only, not training. OpenAI will likely continue using Nvidia GPUs for training its largest models while using Jalapeño to reduce the cost of serving those models to hundreds of millions of ChatGPT users.
Will Jalapeño make ChatGPT cheaper or faster?
Potentially both. The chip delivers better performance per watt than current hardware. Lower serving costs could allow OpenAI to reduce subscription prices, offer more generous free tiers, or improve response speeds.
How was the Jalapeño chip developed so quickly?
OpenAI and Broadcom went from initial design to manufacturing tape-out in just nine months — believed to be the fastest development cycle for a high-performance AI chip. OpenAI used its own AI models to accelerate parts of the chip design and optimisation process.

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